Welcome to Redwood EDA

for the next age of silicon

WE BELIEVE IN

A FUTURE...

...where open-source silicon shapes the industry.

Open-Source Si

...where new domain- and application-specific architectures in the data center address our biggest computational challenges.

Cloud Silicon

...where EDA keeps pace with scaling circuit complexity.

Better EDA

Since the introduction of RTL...

...silicon integration has scaled 70,000x !

RTL was not built for this.

Transaction-level design methodology was conceived for the next  70,000x.

We help organizations to enable and benefit from Transaction-Level Verilog.

And will NOT:

  • Break anything you do today

  • Delay your next milestone 

Which can:

  • Accelerate development

  • Increase resilience

  • Enable reuse

  • Improve silicon quality

  • Save money

BENEFITS

EVERYONE

FRACTALVALLEY

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A hardware-accelerated web application using 1st CLaaS

MAKERCHIP

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Open-source SystemVerilog/TL-Verilog development in your browser

WARP-V

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A flexible open-source RISC-V/MIPS/etc. TL-Verilog CPU core generator

1st CLaaS

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Custom Logic as a Service on cloud FPGAs

Innovation We're Proud Of

I had played the game long enough. It was time to change it.

Steve Hoover, Founder

Copyright 2020, Redwood EDA